Every 7.8μs your computer’s memory has a hiccup

What this post added

This post details an experiment to measure the impact of Dynamic RAM refresh cycles on system performance. It describes the experimental setup, including a tight loop in C with cache flushing and timing measurements, and the challenges of noisy data. The post then explains the application of Fast Fourier Transform (FFT) to analyze the timing data, revealing a dominant frequency corresponding to the DRAM refresh interval (approximately 7.8μs). It also discusses the presence of harmonics and provides a command-line tool for others to replicate the experiment.