
Branch predictor: How many "if"s are too many? Including x86 and M1 benchmarks!
5/6/2021
This post details experiments investigating the performance impact of numerous branch instructions on modern CPUs, specifically focusing on the Branch Target Buffer (BTB). It demonstrates that the cost of a branch instruction increases as the number of branches grows, especially when exceeding the BTB's capacity. Benchmarks on x86 (AMD EPYC) and M1 architectures show performance degradation beyond approximately 4096 branches, with unpredicted branches costing significantly more cycles. The post also explores the impact of code density and block size on branch prediction performance.