Results from the ASIC puzzle

This post details the solution to the ASIC reverse engineering puzzle, which was a hardware checker for an 11x11 Star Battle puzzle. It describes the chip's parallel checks for row, column, and region star counts, adjacency constraints, and total star count. The post also elaborates on the output generator's obfuscation mechanism using an LFSR and the deobfuscation process. It further categorizes and explains the diverse approaches taken by solvers, including netlist extraction, simulation, logical walkthroughs, dynamic exploration, and SAT solving, providing examples of specific techniques and tools used.