Cerebras SDK for HPC

2 posts · Mar 2025

What this trail covers

The Cerebras SDK enhances usability and performance for the Wafer-Scale Engine (WSE) with new collective communications primitives (broadcast, scatter, gather, add-reduce), improved generics support in CSL for IEEE floating point functions, low-level task prioritization features, and an early version of a new host runtime offering over 4x data transfer speed improvements. New examples include Cholesky decomposition and GEMV, showcasing collective communications and the debug library. This release (1.1.0) adds initial support for WSE-3.

All Cerebras trails

Mar 2025What’s New in R0.6 of the Cerebras SDK - CerebrasThis post details the R0.6.0 release of the Cerebras SDK, introducing new collective communications primitives (broadcast, scatter, gather, add-reduce) for inter-PE communication, enhancing CSL with improved generics support for IEEE floating point functions, and adding low-level task prioritization features. A new host runtime is introduced, offering over 4x data transfer speed improvements. New example programs for Cholesky decomposition and GEMV are included, demonstrating the new primitives and debug library.
Mar 2025Supercharge your HPC Research with the Cerebras SDK - CerebrasThis post announces version 1.1.0 of the Cerebras SDK, the first release with initial support for the WSE-3. It details the SDK's capabilities for writing low-level kernels in CSL for all WSE generations, highlighting the dataflow programming model and the fabric simulator for development on x86 resources. It also showcases research highlights from users in seismic processing and Monte Carlo particle transport, demonstrating significant performance improvements over traditional hardware.
Mar 2025Cerebras Wafer-Scale Engine Achieves 210x Speedup Over NVIDIA H100 - CerebrasThis post details a dataflow matrix-free finite volume solver implemented using the Cerebras SDK for geological carbon capture and storage (CCS) simulations. It highlights a 210x speedup over NVIDIA H100 GPUs, attributing the performance gain to the WSE's dataflow architecture, elimination of Jacobian matrices, localized communications, and single-level memory. Algorithmic enhancements include asynchronous communications, vectorization, and memory optimization. The implementation achieved up to 1.217 PFlops on a single node and demonstrated strong scalability.
Mar 2025New Tool Generates Stencil Codes Two Orders of Magnitude Faster on Cerebras WSE Than on GPUsThis post details the performance of the StencilPy code generator on the Cerebras CS-2 system, demonstrating unprecedented speedups for stencil computations compared to GPUs and CPUs. It highlights the unique architecture of Cerebras's Wafer-Scale Systems (WSE) and how StencilPy, built on Cerebras Software Language (CSL), translates high-level stencil definitions into highly optimized CSL code for the WSE, achieving up to 570x speedup over OpenMP on an AMD Genoa CPU and 95x speedup over CUDA on an NVIDIA H100.
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